In recent years, along with the spread of the Internet and the like, in the field of communication, a radio communication technique using a UWB has become more important. Particularly, in the field of radio communication, a technique that enables long-distance communication with high resistance to noise from the outside is needed.
Generally, a radio reception unit has a heterodyne architecture or a direct conversion architecture. A radio reception unit of the heterodyne architecture receives a radio-frequency signal via an antenna, converts the radio-frequency signal into an intermediate frequency signal, and converts the intermediate frequency signal into a baseband signal. In contrast, a radio reception unit of the direct conversion architecture can directly convert a radio-frequency signal into a baseband signal.
While the heterodyne architecture requires two or more mixer circuits, the direct conversion architecture requires only one mixer circuit. Thus, the area of an analog section occupying a large circuit area of the radio reception unit can be reduced. The direct conversion architecture has an advantageous effect of reducing the cost of an LSI.
It is known that, in a general communication system using such direct conversion, self-mixing causes a DC offset to be generated in an output signal of a mixer.
When a DC offset is generated, a distortion of a received signal occurs due to the saturation of a circuit. Consequently, since a signal-to-noise ratio of the received signal is lowered and a demodulation error rate is increased, a possible communication distance is shortened.
FIG. 8 illustrates a configuration of a DC offset correction apparatus of a receiver disclosed in FIG. 4 of Patent Document 1. The DC offset correction apparatus of the receiver of FIG. 8 is used in a communication system which performs frequency hopping of a plurality of bands. The DC offset correction apparatus includes: a control unit 140 that generates and outputs a plurality of different DC offset correction signals for a plurality of bands; a plurality of digital-to-analog converters (DACs) 150-1 to 150-N, each of which receives a corresponding one of the plurality of different DC offset correction signals outputted from the control unit 140, converts the received signal from digital to analog, and outputs the converted analog signal; an analog multiplexer (MUX) 160 that carries out a switching operation to output one of the plurality of different DC offset correction signals outputted from the plurality of DACs; an adder unit 110 that adds an output signal from the analog MUX 160 to an input signal and outputs the resultant signal; an amplifier unit 120; and an analog-to-digital converter (ADC) 130. A DC offset correction operation of the apparatus will be hereinafter described.
The amplifier unit 120 amplifies an output signal from the adder unit 110 based on a predetermined gain G to output the amplified signal. The gain G of the amplifier unit 120 is set by the control unit 140.
The signal supplied to the amplifier unit 120 includes a DC offset signal, and as described above, this DC offset signal is generated owing to a local oscillator signal. Since the local oscillator signal differs depending on the band frequency hopped at each timing, the DC offset level also differs depending on the band frequency hopped at each timing. For example, in a communication system in which N frequencies are switched, assuming that a first DC offset signal is generated when a band hopped at a certain timing is a first band, a second DC offset signal is generated when a band hopped at the next timing is a second band, and an N-th DC offset signal is generated when a currently frequency-hopped band is an N-th band, the first to N-th DC offset signals have different levels.
The ADC 130 converts the analog signal amplified and outputted by the amplifier unit 120 to a digital signal. The ADC 130 supplies the digital signal to a demodulation unit and the control unit 140.
The control unit 140 adjusts a DC offset correction signal and outputs the so adjusted DC offset correction signal. Since the level of each DC offset correction signal differs depending on the band, the control unit 140 generates a different DC offset correction signal for each band. The control unit 140 generates and outputs first to N-th DC offset correction signals to the first to N-th DACs 150-1 to 150-n, respectively.
The first to N-th DACs 150-1 to 150-N convert the first to N-th DC offset correction signals from digital to analog, respectively, and output the converted analog signals to the analog MUX 160.
The analog MUX 160 executes a switching operation in synchronization with a rise or fall of a band-hopping sequence signal and outputs one of the first to N-th DC offset correction signals outputted from the first to N-th DACs 150-1 to 150-N, respectively, to the adder unit 110.
The DC offset correction signal output from the analog MUX 160 is added to the DC offset of the input signal supplied to the adder unit 110. In this way, the DC offset is corrected.
Patent Document 1:
JP Patent Kokai Publication No. JP-P2006-20334A (FIG. 4)